Conventional integrated circuit multichip stacked packaging methods often use the method of wire bonding to connect the circuits on each chip to the circuits on the substrate. Due to the large amount of space occupied by the wire leads, the resulting integrated circuit package is bulky overall. Moreover, the wire leads need to be kept from making contact with each other, which further reduces the number of wire leads that can be wired; and the space utilization rate is low, resulting in a small number of connection lines between the chip and the peripheral circuits, which limits the density and total amount of data communication ports and limits the expansion of circuit functions. Moreover, the wire bonding is sequential bonding of each wire lead, the packaging efficiency is low, and an expensive gold wire or a copper wire with a complicated composition is also required to use, thereby the cost of manufacturing is high.